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semiconductor technical data high performance current mode controller pin connections order this document by mc44602/d p2 suffix plastic package case 648c dip (12 + 2 + 2) 16 1 (top view) compensation load detect input voltage feedback input sink gnd current sense input sync input r t /c t v ref v cc sink gnd source output gnd v c sink output 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 device operating temperature range package ordering information mc44602 t a = 25 to 85 c dip (12 + 2 + 2) 1 motorola analog ic device data
the mc44602 is an enhanced high performance fixed frequency current mode controller that is specifically designed for offline and high voltage dctodc converter applications. this device has the unique ability of changing operating modes if the converter output is overloaded or shorted, offering the designer additional protection for increased system reliability. the mc44602 has several distinguishing features when compared to conventional current mode controllers. these features consist of a foldback amplifier for overload detection, valid load and demag comparators with a fault latch for short circuit detection, thermal shutdown, and separate high current source and sink outputs that are ideally suited for driving a high voltage bipolar power transistor, such as the mje18002, mje18004, or mje18006. standard features include an oscillator with a sync input, a temperature compensated reference, high gain error amplifier, and a current sensing comparator. protective features consist of input and reference undervoltage lockouts each with hysteresis, cyclebycycle current limiting, a latch for single pulse metering, and a flipflop which blanks the output off every other oscillator cycle, allowing output deadtimes to be programmed from 50% to 70%. this device is manufactured in a 16 pin dualinline heat tab package for improved thermal conduction. ? separate high current source and sink outputs ideally suited for driving bipolar power transistors: 1.0 a source, 1.5 a sink ? unique overload and short circuit protection ? thermal protection ? oscillator with sync input ? current mode operation to 500 khz output switching frequency ? output deadtime adjustable from 50% to 70% ? automatic feed forward compensation ? latching pwm for cyclebycycle current limiting ? input and reference undervoltage lockouts with hysteresis ? low startup and operating current simplified block diagram error amplifier foldback amplifier 16 v ref 7 sync input 8 r t /c t 1 compensation 3 voltage feedbackinput v ref undervoltage lockout 5.0v reference v cc undervoltage lockout short circuit detection oscillator flip flop and latching pwm thermal gnd 9 15 v cc 2 11 6 load detect input 14 v c source output 10 sink output 4, 5, 12, 13 sink ground current sense input ? motorola, inc. 1996 rev 0
mc44602 2 motorola analog ic device data maximum ratings rating symbol value unit total power supply and zener current (i cc + i z ) 30 ma sink ground voltage with respect to gnd (pin 9) v sink(neg) 5.0 v output supply voltage with respect to sink gnd (pins 4, 5, 12, 13) v c 20 v output current (note 1) source sink i o(source) i o(sink) 1.0 1.5 a output energy (capacitive load per cycle) w 5.0 m j current sense and voltage feedback inputs v in 0.3 to 5.5 v sync input high state voltage low state reverse current v ih i il 5.5 20 v ma load detect input current i in 20 to +10 ma error amplifier output sink current i ea (sink) 10 ma power dissipation and thermal characteristics maximum power dissipation at t a = 25 c thermal resistance, junctiontoair thermal resistance, junctiontocase p d r q ja r q jc 2.5 80 15 w c/w c/w operating junction temperature t j 150 c operating ambient temperature t a 25 to +85 c note: 1. maximum package power dissipation limits must be observed. electrical characteristics (v cc and v c = 12 v [note 2], r t = 10k, c t = 1.0 nf, for typical values t a = 25 c, for min/max values t a = 25 c to +85 c [note 3] unless otherwise noted.) characteristic symbol min typ max unit error amplifier section voltage feedback input (v o = 2.5v) v fb 2.45 2.5 2.65 v input bias current (v fb = 2.5 v) i ib 0.6 2.0 m a open loop voltage gain (v o = 2.0 v to 4.0 v) a vol 65 90 db unity gain bandwidth t j = 25 c t a = 25 to +85 c bw 1.0 0.8 1.4 1.8 2.0 mhz power supply rejection ratio (v cc = 10 v to 16 v) psrr 65 70 db output current sink (v o = 1.5 v, v fb = 2.7 v) sink t j = 25 c sink t a = 25 to +85 c source (v o = 5.0 v, v fb = 2.3 v) source t j = 25 c source t a = 25 to +85 c i sink i source 1.5 2.0 5.0 1.1 10 0.2 ma output voltage swing high state (i o(source) = 0.5 ma, v fb = 2.3 v) low state (i o(sink) = 0.33 ma, v fb = 2.7 v) v oh v ol 6.0 7.0 1.0 1.1 v notes: 2. adjust v cc above the startup threshold before setting to 12v. 3. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
mc44602 3 motorola analog ic device data electrical characteristics (v cc and v c = 12 v [note 2], r t = 10k, c t = 1.0 nf, for typical values t a = 25 c, for min/max values t a = 25 c to +85 c [note 3] unless otherwise noted.) characteristic symbol min typ max unit oscillator section frequency t j = 25 c t a = 25 c to +85 c f osc 168 160 180 192 200 khz frequency change with voltage (v cc = 12 v to 18 v) d f osc / d v 0.1 0.2 %/v frequency change with temperature d f osc / d t 0.05 %/ c oscillator voltage swing (peaktopeak) v osc(pp) 1.3 1.6 v discharge current (v osc = 3.0 v) t j = 25 c t a = 25 c to +85 c i dischg 6.5 6.0 10 13.5 14 ma sync input threshold voltage high state low state v ih v il 2.5 1.0 2.8 1.3 3.2 1.7 v sync input resistance t j = 25 c t a = 25 c to +85 c r in 6.5 6.0 10 13.5 18 k w reference section reference output voltage (i o = 1.0 ma) v ref 4.7 5.0 5.3 v line regulation (v cc = 12 v to 18 v) reg line 1.0 10 mv load regulation (i o = 1.0 ma to 20 ma) reg load 3.0 15 mv temperature stability t s 0.2 mv/ c total output variation over line, load and temperature v ref 4.65 5.35 v output noise voltage (f = 10 hz to 10 khz, t j = 25 c) v n 50 m v long term stability (t a = 125 c for 1000 hours) s 5.0 mv output short circuit current t j = 25 c t a = 25 c to +85 c i sc 70 130 180 ma current sense section current sense input voltage gain (notes 4 & 5) t j = 25 c t a = 25 c to +85 c a v 2.85 2.7 3.0 3.15 3.2 v/v maximum current sense input threshold (note 4) v th 0.9 1.0 1.1 v input bias current i ib 4.0 10 m a propagation delay (current sense input to sink output) t plh(in/out) 100 150 ns undervoltage lockout sections startup threshold (v cc increasing) v th 13 14.1 15 v minimum operating voltage after turnon (v cc decreasing) v cc(min) 9.0 10.2 11 v reference undervoltage threshold (v ref decreasing) v ref (uvlo) 3.0 3.35 3.7 v notes : 2. adjust v cc above the startup threshold before setting to 12v. 3. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 4. this parameter is measured at the latch trip point with i fb = 5.0 m a, refer to figure 9. 5. comparator gain is defined as a v = d v current sense input d v compensation
mc44602 4 motorola analog ic device data electrical characteristics (v cc and v c = 12 v [note 2], r t = 10k, c t = 1.0 nf, for typical values t a = 25 c, for min/max values t a = 25 c to +85 c [note 3] unless otherwise noted.) characteristic symbol min typ max unit output section output voltage (t a = 25 c) low state (i sink = 100 ma) low state (i sink = 1.0a) low state (i sink = 1.5 a) high state (i source = 50 ma) high state (i source = 0.5 a) high state (i source = 0.75 a) v ol (v cc v oh ) 0.6 1.8 2.1 1.4 1.7 1.8 0.3 2.0 2.6 1.7 2.0 2.2 v output voltage with uvlo activated (v cc = 6.0 v, i sink = 1.0 ma) v ol(uvlo) 0.1 1.1 v output voltage rise time (c l = 1.0 nf, t j = 25 c) t r 50 150 ns output voltage fall time (c l = 1.0 nf, t j = 25 c) t f 50 150 ns pwm section duty cycle maximum minimum dc (max) dc (min) 46 48 50 0 % total device power supply current startup (v cc = 5 v) operating (note 2) t j = 25 c t a = 25 c to +85 c i cc 10 0.2 17 0.5 20 22 ma power supply zener voltage (i cc = 25 ma) v z 18 20 23 v overload and short circuit protection foldback amplifier threshold (figures 9,10) d v fb (v fb 100) (v fb 200) (v fb 300) mv load detect input valid load comparator threshold (v pin 2 increasing) demag comparator threshold (v pin 2 decreasing) propagation delay (input to sink or source output) input resistance v th(vl) v th(demag) t plh(in/out) r in 2.0 50 12 2.5 88 1.1 18 3.0 120 1.6 30 v mv m s k w notes: 2. adjust v cc above the startup threshold before setting to 12v. 3. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. figure 1. timing resistor versus oscillator frequency 0.8 2.0 5.0 8.0 20 50 80 r t , timing resistor (k ) w 1.0 m 500 k 200 k 100 k 50 k 20 k 10 k f osc , oscillator frequency (hz) c t =100 pf c t =500 pf figure 2. output deadtime versus oscillator frequency 1.0 m 100 k 10 k f osc , oscillator frequency (hz) 50 % dt, percent output deadtime ? ? 1 ?? ?? 2 ? ? 3 ?? ?? 4 ?? 5 55 60 65 70 75 ? ? 6 30 10 3.0 1.0 20 k 50 k 200 k 500 k note: output switches at onehalf the oscillator frequency. v cc = 12 v t a = 25 c c t =10 nf c t =1.0 nf c t =200 pf c t =2.0 nf v cc = 12 v t a = 25 c note: output switches at onehalf the oscillator frequency. c t =5.0 nf ???? ???? ???? ???? 1. c t = 10 nf 2. c t = 5.0 nf 3. c t = 2.0 nf 4. c t = 1.0 nf 5. c t = 500 pf 6. c t = 100 pf
mc44602 5 motorola analog ic device data osc figure 3. oscillator discharge current versus temperature , discharge current (ma) 55 t a , ambient temperature ( c) 25 0 25 50 75 100 125 dischg i 12 v cc = 12 v v osc = 3.0 v figure 4. oscillator voltage swing versus temperature 20 a vol , open loop voltage gain (db) 10 m 0.1 k f, frequency (hz) gain phase 0 30 60 90 120 150 180 1.0 k 10 k 100 k 1.0 m 0 20 40 60 80 100 excess phasse (degrees) figure 5. error amp small signal transient response 0 v o , error amp output voltage (v) 0 , current sense input threshold (v) v th 0.2 0.4 0.6 0.8 1.0 1.2 2.0 4.0 6.0 v cc = 12 v t a = 25 c t a = 125 c t a = 40 c figure 6. error amp large signal transient response figure 7. error amp open loop gain and phase versus frequency figure 8. current sense input threshold versus error amp output voltage , oscillator voltage swing (v) v 5.0 4.0 3.0 2.0 1.0 0 55 t a , ambient temperature ( c) 25 0 25 50 75 100 125 v cc = 12 v r t = 10 k c t = 1.0 nf peak voltage valley voltage 1.0 3.0 5.0 7.0 11 10 9.0 8.0 7.0 v cc = 12 v v o = 2.0 v to 4.0 v r l = 100 k t a = 25 c 2.55 v 2.5 v 2.45 v 3.0 v 2.5 v 2.0 v t, time (0.5 m s/div) t, time (1.0 m s/div) v cc = 12 v a v = 1.0 t a = 25 c v cc = 12 v a v = 1.0 t a = 25 c 20 mv/div 200 mv/div
mc44602 6 motorola analog ic device data , reference voltage change (mv) ref v d 80 figure 9. voltage feedback input, voltage versus current 0 0 100 r ja , thermal resistance junction to air ( c/w) q 80 60 40 20 10 20 30 40 50 l, length of copper (mm) r q ja p d , maximum power dissipation (w) 5.0 4.0 3.0 2.0 1.0 0 p d(max) for t a = 70 c figure 10. voltage feedback input versus current sense clamp level figure 11. reference short circuit current versus temperature figure 12. reference line and load regulation versus temperature figure 13. reference voltage change versus source current figure 14. thermal resistance and maximum power dissipation versus p.c.b. copper length , input voltage (v) 1.0 500 i in , input current ( m a) in v 1.4 1.8 2.2 2.6 400 300 200 100 0 v clamp = 1.0 v v clamp = 0.7 v v clamp = 0.3 v v cc = 12 v t a = 25 c v clamp = 0.1 v v clamp = 0.5 v , input voltage (v) in v 1.0 0 v clamp , current sense clamp level (v) 1.4 1.8 2.2 2.6 0.2 0.4 0.6 0.8 1.0 t a = 125 c v cc = 12 v t a = 55 c , reference short circuit current (ma) sc i 40 55 t a , ambient temperature ( c) 120 160 200 25 0 25 50 75 100 125 v cc = 12 v r l 0.1 w , reference voltage change (ma) ref v 3.0 55 t a , ambient temperature ( c) 25 0 25 50 75 100 125 d 2.0 1.0 0 1.0 2.0 3.0 4.0 5.0 line regulation v cc = 12 v to 18 v i ref = 0 ma 0 i ref , reference source current (ma) 0 30 60 90 120 150 180 5.0 10 15 20 25 30 t a = 125 c t a = 25 c t a = 55 c load regulation v cc = 12 v i ref = 1.0 ma to 20 ma t a = 25 c v cc = 12 v graphs represent symmetrical layout 3.0 mm printed circuit board heatsink example l l 2.0 oz copper
mc44602 7 motorola analog ic device data figure 15. output waveform figure 16. output cross conduction figure 17. sink output saturation voltage versus sink current figure 18. source output saturation voltage versus load current figure 19. supply current versus supply voltage figure 20. power supply zener voltage versus temperature , sink output saturation voltage (v) sat v 0 i sink , sink output current (ma) 3.0 250 500 750 1000 1250 1500 1750 2.5 2.0 1.5 1.0 0.5 0 t j = 125 c gnd , sink output saturation voltage (v) sat v 0 i source , output source current (ma) 0 150 300 450 600 750 900 0.5 1.0 1.5 2.0 2.5 3.0 t j = 55 c source saturation (load to ground) v cc , supply current (ma) cc i 0 v cc , supply voltage (v) 32 4.0 8.0 12 16 20 24 0 24 16 8.0 r t = 10 k c t = 1.0 nf v fb = 0 v current sense = 0 v t a = 25 c , zener voltage (v) cc v 55 t a , ambient temperature ( c) 23 25 0 25 50 75 125 19 22 21 20 100 i cc = 25 ma sink saturation (load to v cc ) v cc = 12 v 80 m s pulsed load 120 hz rate t j = 125 c v cc = 12 v 80 m s pulsed load 120 hz rate t j = 25 c t j = 55 c 90% 10% 1.0 a 0 1.0 a t, time (100 ns/div) v cc = 12 v c l = 2.0 nf t a = 25 c v cc = 12 v c l = 15 pf t a = 25 c voltage current t, time (50 ns/div) 90% 10% 20 ma/div , supply current cc i , output voltage o v t j = 25 c
mc44602 8 motorola analog ic device data figure 21. valid load comparator threshold versus temperature figure 22. demag comparator threshold versus temperature figure 23. load detect input propagation delay versus temperature figure 24. startup threshold voltage versus temperature figure 25. minimum operating voltage after turnon versus temperature figure 26. reference undervoltage threshold versus temperature , valid load comparator threshold (v) th(vl) v 55 t a , ambient temperature ( c) 3.2 25 0 25 50 75 125 2.0 2.8 2.4 100 v cc = 12 v , demag comparator threshold (mv) th(demag) v 55 t a , ambient temperature ( c) 120 25 0 25 50 75 125 60 100 80 100 v cc = 12 v , load detect propagation delay ( s) plh(in/out) t 55 t a , ambient temperature ( c) 1.4 25 0 25 50 75 125 0.8 1.2 1.0 100 m v cc = 12 v r t = 10 k c t = 1.0 nf , startup threshold voltage (v) th v 55 t a , ambient temperature ( c) 14.5 25 0 25 50 75 125 13.7 100 14.3 14.1 13.9 v cc increasing , minimum operating voltage (v) cc(min) v 55 t a , ambient temperature ( c) 10.35 25 0 25 50 75 125 100 10.25 10.15 10.05 9.95 v cc decreasing , reference undervoltage threshold (v) ref(uvlo) v 55 t a , ambient temperature ( c) 3.42 25 0 25 50 75 125 100 3.38 3.34 3.30 v ref decreasing
mc44602 9 motorola analog ic device data figure 27. representative block diagram startup without foldback figure 28. timing diagram capacitor c t 2.8v 1.2v 0v pwm latch aseto input toggle flip flop q output current sense input c v clamp * c nc nc nc nc c c c nc pwm latch aseto input source output load detect input 2.5v 85mv 0v demag output fault latch q sync input 2.5v 0v startup with foldback normal operation output overload *c = comparison of current sense input with v clamp nc = no comparison of current sense input with v clamp + v ref 16 7 8 1 3 sync input r t c t compensation voltage feedback input r 1 r 2 2.5v r r internal bias 3.6v + reference regulator reference uvlo v cc uvlo 14v 20v 15 v cc v cc demag comparator 85mv valid load comparator 2.5v fault latch r s q 10k oscillator 1.0 ma 2.5v error amplifier 2r r 2.5v foldback amplifier 1.0v gnd 9 sink only positive true logic current sense comparator pwm latch thermal r s q r tq 18k load detect input 2 14 11 10 6 v c source output sink output sink ground 4, 5, 12, 13 current sense input substrate v in v out q1 r s = + c o i
mc44602 10 motorola analog ic device data operating description the mc44602 is a high performance, fixed frequency, current mode controller specifically designed to directly drive a bipolar power switch in offline and high voltage dctodc converter applications. this device offers the designer a cost effective solution with minimal external components. the representative block and timing diagrams are shown in figures 27 and 28. oscillator the oscillator frequency is programmed by the values selected for the timing components r t and c t . capacitor c t is charged from the 5.0 v reference through resistor r t to approximately 2.8 v and discharged to 1.2 v by an internal current sink. during the discharge of c t , the oscillator generates an internal blanking pulse that holds one of the inputs of the nor gate high. this causes the source and sink outputs to be in a low state, thus producing a controlled amount of output deadtime. an internal toggle flipflop has been incorporated in the mc44602 which blanks the output off every other clock cycle by holding one of the inputs of the nor gate high. this in combination with the c t discharge period yields output deadtimes programmable from 50% to 70%. figure 1 shows r t versus oscillator frequency and figure 2, output deadtime versus frequency, both for a given value of c t . note that many values of r t and c t will give the same oscillator frequency but only one combination will yield a specific output deadtime at a given frequency. in many noise sensitive applications it may be desirable to frequencylock the converter to an external system clock. this can be accomplished by applying a narrow rectangular clock signal with an amplitude of 3.2 v to 5.5 v to the sync input (pin 7). for reliable locking, the freerunning oscillator frequency should be set about 10% less than the clock frequency. if the clock signal is ac coupled through a capacitor, an external clamp diode may be required if the negative sync input current is greater than 5.0 ma. connecting pin 7 to v ref will cause c t to discharge to 0 v, inhibiting the oscillator and conduction of the source output. multiunit synchronization can be accomplished by connecting the c t pin of each ic to a single mc1455 timer. error amplifier a fully compensated error amplifier with access to the inverting input and output is provided. it features a typical dc voltage gain of 90 db, and a unity gain bandwith of 1.0 mhz with 57 degrees of phase margin (figure 7). the noninverting input is internally biased at 2.5 v and is not pinned out. the converter output voltage is typically divided down and monitored by the inverting input. the maximum input bias current with the inverting input at 2.5 v is 2.0 m a. this can cause an output voltage error that is equal to the product of the input bias current and the equivalent input divider source resistance. the error amp output (pin 1) is provided for external loop compensation (figure 29). the output voltage is offset by two diodes drops ( 1.4 v) and divided by three before it connects to the inverting input of the current sense comparator. this guarantees that no drive pulses appear at the source output (pin 11) when pin 1 is at its lowest state (v ol ). this occurs when the power supply is operating and the load is removed, or at the beginning of a softstart interval. the error amp minimum feedback resistance is limited by the amplifier's minimum source current (0.5 ma) and the required output voltage (v oh ) to reach the comparator's 1.0 v clamp level: r f(min) 3.0 (1.0 v) 1.4 v 0.5ma 8800 + 1.0 ma 2.5v 2.5v figure 29. error amplifier compensation compensation r fb c f r 1 r 2 from power supply output r f 1 3 voltage feedback input error amplifier foldback amplifier 2r r 1.0v current sense comparator gnd 9 i current sense comparator and pwm latch the mc44602 operates as a current mode controller, where output switch conduction is initiated by the oscillator and terminated when the peak inductor current reaches the threshold level established by the error amplifier output (pin 1). thus the error signal controls the peak inductor current on a cyclebycycle basis. the current sense comparator pwm latch configuration used ensures that only a single pulse appears at the source output during the appropriate oscillator cycle. the inductor current is converted to a voltage by inserting the ground referenced sense resistor r s in series with the emitter of output switch q1. this voltage is monitored by the current sense input (pin 6) and compared to a level derived from the error amp output. the peak inductor current under normal operating conditions is controlled by the voltage at pin 1 where: l pk v (pin1) 1.4v 3r s abnormal operating conditions occur when the power supply output is overloaded or if output voltage sensing is lost. under these conditions, the current sense comparator threshold will be internally clamped to 1.0 v. therefore the maximum peak switch current is: l pk(max) 1.0 v r s
mc44602 11 motorola analog ic device data a narrow spike on the leading edge of the current waveform can usually be observed and may cause the power supply to exhibit an instability when the output is lightly loaded. this spike is due to the power transformer interwinding capacitance and the output rectifier recovery time. the addition of an rc filter on the current sense input with a time constant that approximates the spike duration will usually eliminate the instability; refer to figure 30. undervoltage lockout two undervoltage lockout comparators have been incorporated to guarantee that the ic is fully functional before the output stage is enabled. the positive power supply terminal (v cc ) and the reference output (v ref ) are each monitored by separate comparators. each has builtin hysteresis to prevent erratic output behavior as their respective thresholds are crossed. the v cc comparator upper and lower thresholds are 14.1 v/10.2 v. the v ref comparator upper and lower thresholds are 3.6 v/3.3 v. the large hysteresis and low startup current of the mc44602 make it ideally suited for offline converter applications (figures 33, 34) where efficient bootstrap startup techniques are required. a 20 v zener is connected as a shunt regulator from v cc to ground. its purpose is to protect the ic from excessive voltage that can occur during system startup. the upper limit for the minimum operating voltage of the mc44602 is 11v. outputs the mc44602 contains a high current split totem pole output that was specifically designed for direct drive of bipolar power transistors. by splitting the totem pole into separate source and sink outputs, the power supply designer has the ability to independently adjust the turnon and turnoff base drive to the external power transistor for optimal switching. the source and sink outputs are capable of up to 1.0 a and 1.5 a respectively and feature 50 ns switching times with a 1.0 nf load. additional internal circuitry has been added to keep the source output aoffo and the sink output aono whenever an undervoltage lockout is active. this feature eliminates the need for an external pulldown resistor and guarantees that the power transistor will be held in the aoffo state. separate output stage power and ground pins are provided to give the designer added flexibility in tailoring the base drive circuitry for a specific application. the source output highstate is controlled by applying a positive voltage to v c (pin 14) and is independent of v cc . a zener clamp is typically connected to this input when driving power mosfets in systems where v cc is greater than 20v. the sink output lowstate is controlled by applying a negative voltage to the sink ground (pins 4, 5, 12, 13). the sink ground can be biased as much as 5.0 v negative with respect to ground (pin 7). proper implementation of the v c and sink ground pins will significantly reduce the level of switching transient noise imposed on the control circuitry. this becomes particularly useful when reducing the i pk(max) clamp level. reference the 5.0 v bandgap reference has a tolerance of 6.0% over a junction temperature range of 25 c to 85 c. its primary purpose is to supply charging current to the oscillator timing capacitor. the reference has short circuit protection and is capable of providing in excess of 20 ma for powering additional control system circuitry. figure 30. bipolar transistor drive and current spike suppression pwm latch r s q r tq 14 11 10 6 v c source sink sink gnd 4, 5, 12, 13 current sense substrate v in q1 r s current sense comparator 0 + i b base charge removal c b r b1 r b2 l b r c thermal protection and package internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated, typically at 160 c, the pwm latch is held in the areseto state, forcing the source output aoffo and the sink output aono. this feature is provided to prevent catastrophic failures from accidental device overheating. it is not intended to be used as a substitute for proper heatsinking. the mc44602 is contained in a heatsinkable 16lead plastic dualinline package in which the die is mounted on a special heat tab copper alloy lead frame. this tab consists of the four center sink ground pins that are specifically designed to improve the thermal conduction from the die to the circuit board. figure 14 shows a simple and effective method of utilizing the printed circuit medium as a heat dissipater by soldering these pins to an adequate area of copper foil. this permits the use of standard layout and mounting practices while having the ability to halve the junction to air thermal resistance. this example is for a symmetrical layout on a singlesided board with two ounce per square foot of copper.
mc44602 12 motorola analog ic device data design considerations do not attempt to construct the converter on wirewrap or plugin prototype boards. high frequency circuit layout techniques are imperative to prevent pulsewidth jitter. this is usually caused by excessive noise pickup imposed on the current sense or voltage feedback inputs. noise immunity can be improved by lowering circuit impedances at these points. the printed circuit layout should contain a ground plane with lowcurrent signal, and high current switch and output grounds returning on separate paths back to the input filter capacitor. ceramic bypass capacitors (0.1 m f) connected directly to v cc , v c , and v ref may be required depending upon circuit layout. this provides a low impedance path for filtering the high frequency noise. all high current loops should be kept as short as possible using heavy copper runs to minimize radiated emi. the error amp compensation circuitry and the converter output voltage divider should be located close to the ic and as far as possible from the power switch and other noise generating components. protection modes the mc44602 operates as a conventional fixed frequency current mode controller when the power supply output load is less than the design limit. for enhanced system reliability, this device has the unique ability of changing operating modes if the power supply output is overloaded or shorted. overload protection power supply overload protection is provided by the foldback amplifier. as the output load gradually increases, the error amplifier senses that the voltage at pin 3 is less than the 2.5 v threshold. this causes the voltage at pin 1 to rise, increasing the current sense comparator threshold in order to maintain output regulation. as the load further increases, the inverting input of the current sense comparator reaches the internal 1.0 v clamp level, limiting the switch current to the calculated i pk(max) . at this point any further increase in load will cause the power supply output to fall out of regulation. as the voltage at pin 3 falls below 2.5 v, current will flow out of the foldback amplifier input, and the internal clamp level will be proportionally reduced (figures 9, 10). the increase in current flowing out of the foldback amplifier input in conjunction with the reduced clamp level, causes the power supply output voltage to fall at a faster rate than the voltage at pin 3. this results in the output foldback characteristic shown in figure 31. the shape of the current limit akneeo can be modified by the value of resistor r 1 in the feedback divider. lower values of r 1 will reduce the i pk(max) clamp level at a faster rate. improper operation of the foldback amp can be encountered when the error amp compensation capacitor c f exceeds 2.0 nf. the problem appears at startup when the output voltage of the power supply is below nominal, causing the error amp output to rise quickly. the rapid change in output voltage will be coupled through c f to the inverting input (pin 3), keeping it at its 2.5 v threshold as the 1.0 ma error amp current source charges c f . this has the effect of disabling the foldback amp by preventing pin 3 and the clamp level at the inverting input of the current sense comparator, from rising in proportion to the power supply output voltage. by adding resistor r fb in series with c f , the voltage at pin 3 can be held to 1.0 v, corresponding to a current sense clamp level of 0.08 v (figure 10), while allowing the error amp output to reach its high state v oh of 7.0 v. the required resistor to keep pin 3 below 1.0 v during initial startup is: r fb r f r fb + r f 6 r 1 r 2 r 1 + r 2 figure 31. output foldback characteristic v cc uvlo threshold v o nominal i out v out l pk(max) new startup sequence initiated low value r 1 high value r 1 nominal load range overload short circuit protection short circuit protection for the power supply is provided by the valid load comparator, fault latch, and demag comparator. figure 32 shows the logic truth table of the functional blocks. when operating the power supply with nominal output loading, the fault latch is aseto by the nor gate driver during the power transistor aono time and areseto by the fault comparator during the aoffo time. when a severe overload or short circuit occurs on any output, the voltage during the aoffo time (flyback voltage) at the load detect input, is unable to reach the 2.5 v threshold of the valid load comparator. this causes the fault latch to remain in the aseto state with output q alowo. during the aoffo time the demag comparator output will also be alowo. this causes the nor gate to internally hold the sync input ahigho, inhibiting the next fixed frequency oscillator cycle and switching of the power transistor. as the load dissipates the stored transformer energy, the voltage at the load detect input will fall. when this voltage reaches 85 mv, the demag comparator output goes ahigho, allowing the sync input to go alowo, and the power transistor to turn aono. note that as long as there is an output short, the switching frequency will shift to a much lower frequency than that set by r t /c t . the frequency shift has the effect of lowering the duty cycle, resulting in a significant reduction in power transistor and output rectifier heating when compared to conventional current mode controllers. the extended aono time is the result of c t charging from 0 v to 2.8 v instead of 1.2 v to 2.8 v. the extended aoffo time is the result of the output short time constant. the time constant consists of the output filter capacitance, and the equivalent series resistance (esr) of the capacitor plus the associated wire resistance.
mc44602 13 motorola analog ic device data figure 32. logic truth table of functional blocks output power demag fault latch sync output load power transistor input out s r q input operating comments nominal on <85mv 1 1 0 0 0 nor gate driver sets fault latch. at turnoff >85 mv, <2.5 v 0 0 0 0 narrow spike at sync input (<2.5 v) as transformer voltage rises quickly, oscillator is not affected. off >2.5 v 0 0 1 1 0 valid load comparator resets fault latch. short on <85 mv 1 1 0 0 0 short is not detected until transistor turnoff. at turnoff >85 mv, <2.5 v 0 0 0 0 1 valid load comparator fails to reset fault latch, pulse at sync input exceeds 2.5 v, oscillator is disabled. off <85 mv 1 0 0 0 0 load dissipates transformer energy, oscillator enabled. during the initial power supply startup the controller sequences through the short circuit and overload protection modes as the output filter capacitors chargeup. if an output is shorted and the auxiliary feedback winding is used to power the control ic as in figure 33, the v cc uvlo lower threshold level will be reached after several cycles, disabling the ic and initiating a new startup sequence. the short circuit protection mode can be disabled by grounding the sync input. narrow switching spikes are present on this pin during normal operation. these spikes are caused by the rise time of the flyback voltage from the 85 mv demag comparator threshold to the 2.5 v valid load comparator threshold. in high power applications, the increased negative current at the load detect input can extend the switching spikes to the point where they exceed the sync input threshold. this problem can be eliminated by placing an external small signal clamp diode at the load detect input. the diode is connected with the cathode at pin 2 and the anode at ground. the dividebytwo toggle flipflop will appear not to function properly during power supply startup without foldback, or operation with an overloaded output. this phenomena appears at the end of the oscillator cycle if there was not a current sense comparison, and after the flyback voltage at the load detect input failed to exceed 2.5 v. under these conditions, the sync input will go high approximately 1.0 m s after the load detect input exceeds the 85 mv demag comparator threshold. this causes c t to discharge down towards ground, generating a second negative going edge on the oscillator waveform. this second edge results in the dividebytwo flipflop being clocked twice for each aono time of the switch transistor. during initial startup, this effect can be eliminated by insuring that the foldback amplifier is fully active with the addition of resistor r fb . with the foldback amplifier active, the clamp level at the inverting input of the current sense comparator will be low, allowing a comparison to take place during the switch transistor aono time. when the load detect input exceeds 85 mv, the sync input will go high, discharging c t to ground after 1.0 m s, thus eliminating the second negative edge. operation with the output overloaded will cause the toggle flipflop to be clocked twice for each aono time. this should not be a problem since the next aono time is delayed by the demag comparator until the load dissipates the transformers energy. the point where the ic detects that there is a severe output overload, or that the transformer has reached zero current, is controlled by the voltage of the auxiliary winding and a resistor divider. the divider consists of an external series resistor and an internal shunt resistor. the shunt resistor is nominally 18 k w but can range from 12 k w to 30 k w due to process variations. if more precise overload and zero current detection is required, the internal resistor variations can be swamped out by connecting a low value external resistor ( 2.7 k w ) from pin 2 to ground.
mc44602 14 motorola analog ic device data pin function description pin function description 1 compensation this pin is the error amplifier output and is made available for loop compensation. 2 load detect input a voltage indicating a severe overload or short circuit condition at any output of the switching power supply is connected to this input. the oscillator is controlled by this information making the power supply short circuit proof. 3 voltage feedback input this is the inverting input of the error amplifier and the noninverting input of the foldback amplifier. it is normally connected to the switching power supply output through a resistor divider. 4, 5, 12, 13 sink ground the sink ground pins form a single power return that is typically connected back to the power source on a separate path from pin 9 ground, to reduce the effects of switching transient noise on the control circuitry. these pins can be used to enhance the package power capabilities (figure 14). the sink output low state (v ol ) can be modified by applying a negative voltage to these pins with respect to ground (pin 9) to optimize turnoff of a bipolar junction transistor. 6 current sense input a voltage proportional to inductor current is connected to this input. the pwm uses this information to terminate conduction of the output switch transistor. 7 sync input a narrow rectangular waveform applied to this input will synchronize the oscillator. a dc voltage within the range of 3.2 v to 5.5 v will inhibit the oscillator. 8 r t /c t the oscillator frequency and maximum output duty cycle are programmed at this pin by connecting resistor r t to v ref and capacitor c t to ground. 9 ground this pin is the control circuitry ground and is typically connected back to the power source on a separate path from the sink ground (pins 4, 5, 12, 13). 10 sink output peak currents up to 1.5 a are sunk by this output suiting it ideally for turningoff a bipolar junction transistor. the output switches at onehalf the oscillator frequency. 11 source output peak currents up to 1.0 a are sourced by this output suiting it ideally for turningon a bipolar junction transistor. the output switches at onehalf the oscillator frequency. 14 v c the output high state (v oh ) is set by the voltage applied to this pin. with a separate connection to the power source, it can reduce the effects of switching transient noise on the control circuitry. 15 v cc this pin is the positive supply of the control ic. the minimum operating voltage range after startup is 11 v to 18 v. 16 v ref this is the 5.0 v reference output. it provides charging current for capacitor c t through resistor r t and can be used to bias any additional system circuitry.
mc44602 15 motorola analog ic device data 85 to 265 vac 2.2 1n5404 470 1n4148 0.1 470pf 15k 270 47k 2.0w 1n4934 1.0 m h 24k 10k 1.0k 10k 2.2nf 1n4148 220 3.3nf 22 0.33 m h 47nf 1.0nf 1.0k 0.82 1.0nf/1.0kv 4.7m mje18006 390 220pf mur 4100 220 85v/0.5a 220pf mur 415 470 0.1 0.1 20v/0.6a 220pf 470 0.1 6.8v/0.8a mbr 340 470pf mur 460 8.2k 2.0w 1.0 47 figure 33. 60 watt offline flyback regulator 470k t1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 mc44602 0.1 m f 47k test conditions results line regulation 85v 20v 6.8v v in = 85 vac to 265 vac i o = 0.5 a i o = 0.5 a i o = 0.8 a d = 1.0 v or 0.6% d = 0.04 v or 0.1% d = 0.07 v or 0.5% load regulation 85v 20v 6.8v v in = 220 vac i o = 0.1 a to 0.5 a i o = 0.1 a to 0.5 a i o = 0.1 a to 0.8 a d = 1.0 v or 0.6% d = 0.4 v or 1.0% d = 0.2 v or 1.5% efficiency v in = 110 vac, p o = 58 w 81% standby power v in = 110 vac, p o = 0 w 2.0 w t1 core gap orega smt2 (g478701) primary: 41 turns, #25awg auxiliary feedback: 12 turns, #25awg secondary: 85 v 60 turns, #25awg secondary: 20 v 15 turns, #25awg (2 strands) bifiliar wound secondary: 6.8 v 5 turns, #25awg (2 strands) bifiliar wound etd39 34x17x11 b52 0.020 for a primary inductance of 750 m h, a l = 500 nh/turn 2
mc44602 16 motorola analog ic device data 390 220pf mur 4100 220 155v/0.5a 220pf mur 415 470 0.1 0.1 24.5v/1.8a 220pf 470 0.1 15.5v/1.8a mur 415 figure 34. 150 watt offline flyback regulator 220 vac 4.7 1n5404 100 1n4148 0.1 470pf 15k 270 47k 2.0w 1n4934 1.0 m h 24k 10k 1.0k 10k 2.2nf 1n4148 220 3.3nf 22 2.2 m h 47nf 1.0nf 1.0k 0.47 1.0nf/1.0kv 4.7m mje18006 470pf mur 460 8.2k 2.0w 1.0 47 470k t1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 mc44602 0.1 m f 47k test conditions results line regulation 155v 24.5v 15.5v v in = 185 vac to 265 vac i o = 0.5 a i o = 1.0. a i o = 1.0 a d = 1.0 v or 0.3% d = 0.4 v or 0.8% d = 0.3 v or 1.0% load regulation 155v 24.5v 15.5v v in = 220 vac i o = 0.1 a to 0.5 a i o = 0.1 a to 1.0 a i o = 0.1 a to 1.0 a d = 2.0 v or 0.7% d = 0.4 v or 0.8% d = 0.2 v or 0.7% efficiency v in = 220 vac, p o = 117.5 w 83% standby power v in = 220 vac, p o = 0 w 5.0 w t1 core gap orega smt2 (g471701) primary: 55 turns, #25awg auxiliary feedback: 6 turns, #25awg secondary: 155 v 52 turns, #25awg secondary: 24.5 v 9 turns, #25awg (2 strands) bifiliar wound secondary: 15.5 v 6 turns, #25awg (2 strands) bifiliar wound getv 53x18x18 b52 0.020 for a primary inductance of 1.35 m h, a l = 450 nh/turn 2
mc44602 17 motorola analog ic device data outline dimensions p2 suffix plastic package case 648c03 issue c dim min max min max millimeters inches a 0.740 0.840 18.80 21.34 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 e 0.050 bsc 1.27 bsc f 0.040 0.70 1.02 1.78 g 0.100 bsc 2.54 bsc j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l 0.300 bsc 7.62 bsc m 0 10 0 10 n 0.015 0.040 0.39 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. internal lead connection between 4 and 5, 12 and 13. a b 16 9 18 f d g e n k c note 5 16 pl s a m 0.13 (0.005) t t seating plane s b m 0.13 (0.005) t j 16 pl m l
mc44602 18 motorola analog ic device data motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. atypicalo parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/affirmative action employer. how to reach us: usa / europe / locations not listed : motorola literature distribution; japan : nippon motorola ltd.; tatsumispdjldc, 6f seibubutsuryucenter, p.o. box 20912; phoenix, arizona 85036. 18004412447 or 6023035454 3142 tatsumi kotoku, tokyo 135, japan. 038135218315 mfax : rmfax0@email.sps.mot.com touchtone 6 022446609 asia / pacific : motorola semiconductors h.k. ltd.; 8b tai ping industrial park, internet : http://designnet.com 51 ting kok r oad, tai po, n.t., hong kong. 85226629298 mc44602/d ?

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